71.1 Description

The USB 2.0 PHY integrates high-speed, full-speed and low-speed (Host mode only) termination and signal switching. With a single resistor, it requires minimal external components.

The USB 2.0 PHY is compliant with the Universal Serial Bus Specification, Revision 2.0, the USB Battery Charging Specification, Revision 1.2, the Embedded Host Supplement to the USB Revision 2.0 Specification, Revision 2.0, and the UTMI+ Specification, Revision 1.0 (Level 3).

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