22.3.1 GPBR Mode Register

This register is write-once. All bits are cleared at first power-up and on each loss of VBAT.

This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode register (SYSC_WPMR).

Name: GPBR_MR
Offset: 0x0
Reset: 0x00000000
Property: Read/Write-Once

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
       GPBRRP1GPBRRP0 
Access R/WR/W 
Reset 00 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
       GPBRWP1GPBRWP0 
Access R/WR/W 
Reset 00 

Bits 16, 17 – GPBRRPx GPBRx Read Protection

ValueDescription
0

The content of the corresponding GPBR register (32-bit part-select) can be read.
1

The corresponding GPBR register (32-bit part-select) always returns zero when read.

Bits 0, 1 – GPBRWPx GPBRx Write Protection

ValueDescription
0

The corresponding GPBR register (32-bit part-select) can be written.
1

The corresponding GPBR register (32-bit part-select) is write-protected.