47.2 Embedded Characteristics

  • SPDIF/AES-EBU Compatible Serial Port
  • 32 Samples FIFO
  • Data Width Configurable to 24 bits, 20 bits or 16 bits
  • Packed and Unpacked Data Support for System Memory Optimization
  • Line State Events Report and Source of Interrupt
  • Full Memory Map of 192 bits for Channel 1 and Channel 2 Status and User Data
  • First 32-bit Status A, Status B Change Report and Source of Interrupt
  • Line Digital Filter
  • Functional Safety Monitors and Reports
    • Internal sequencer integrity check reports
    • Register Write Protection