3.2.5.6 PIOBU Lines

The PIOBU lines are special "tamper" inputs used to manage board "events" and make the MPU exit from Backup mode. Typically, they are connected to "event-prone" interfaces: GMAC0, GMAC1, M.2 slot, auxiliary header.

Table 3-3. PIOBU Lines
PIOBU	Net	Event Source
PIOBU0	GMAC0_0.WAKE	GMAC 0
PIOBU1	GMAC1_0.WAKE	GMAC 1
PIOBU2	AUX_IO0_0.PIOBU2	AUXILIARY (J73) M.2
PIOBU3	AUX_IO0_0.PIOBU3	AUXILIARY (J73)

DS50004143A

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