25.5.3.9 Memory CRC Generation

When enabled, it is possible to automatically calculate a memory block checksum. When the channel is enabled and the descriptor is fetched, the CRC Checksum register (CRCCHKSUM) is reloaded with the initial checksum value (CHKINIT) stored in the Block Transfer Destination Address register (DSTADDR). The DMA read and calculate the checksum over the data from the source address.When the checksum calculation is completed, the CRC value is stored in the CRC Checksum register (CRCCHKSUM), the Transfer Complete interrupt flag is set (CHINTFLAGn.TCMPL) and optional interrupt is generated.

If linked descriptor is in the list (DESCADDR !=0), the DMA will fetch the next descriptor and CRC calculation continues as described above. When the last list descriptor is executed, the channel is automatically disabled.

In order to enable the memory CRC generation, the following actions must be performed:

  1. The CRC module must be set to be used with a DMA channel (CRCCTRL.CRCSRC)
  2. Reserve memory space addresses to configure a descriptor or a list of descriptors
  3. Configure each descriptor:
    • Set the next descriptor address (DESCADDR)
    • Set the destination address with the initial checksum value (DSTADDR = CHKINIT) in the first descriptior in a list
    • Set the transfer source address (SRCADDR)
    • Set the block transfer count (BTCNT)
    • Set the memory CRC generation operation mode (CRCCTRL.CRCMODE = CRCGEN)
    • Enable optional interrupts
  4. Enable the corresponding DMA channel (CHCTRLAn.ENABLE)

The figure below shows the CRC computation slots and descriptor configuration when single or linked-descriptors transfers are enabled.

Figure 25-20. CRC Computation with Single Linked Transfers