51.6.2.4 Prescaler Selection

The ADC is clocked by GCLK_ADCx. There is also a prescaler in the ADC to enable conversion at lower clock rates. Refer to CTRLA for details on prescaler settings. Refer to 51.6.2.8 Conversion Timing and Sampling Rate for details on timing and sampling rate.

Figure 51-2. ADC Prescaler
Note: The minimum prescaling factor is DIV2.