43.5 Peripheral Dependencies

Peripheral Name CCL – Configurable Custom Logic
Base Address 0x4200_3800 (Peripheral Bus C)
MCLK APB Clock (1) CLK_CCL_APB, Disabled, APBCMASK.CCL
GCLK Peripheral Channel Index:Clock Name (2) 33 : GCLK_CCL
PAC Peripheral Peripheral Identifier (PAC.WRCTRL) 78
EVSYS Users (EVSYS.USERm) (3) 63..66 : LUTx Input, x=0..3 (CCL_LUTIN 0..3) (A)
EVSYS Generators (EVSYS.CHANNELn) 116-119 : LUTx Output, x=0..3, (CCL_LUTOUT)
Note:
  1. Clock Name, Default State, Mask Field.
  2. See GCLK.PCHCTRLm Register, where m = Index.
  3. (A,S,R): A = Asynchronous path, S = Synchronous path, R = Resynchronized path.