3.7.7.5 Receive CRC Checker

The ATA8210/15 implements a highly configurable hardware CRC checker for the received data payload. The CRC checker can be activated independently for path A and path B of each service in the eepServices.RXBC1.RXCEx variables.

Address Service0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x0125

RXBC1

RXMSBB

RXCBLB[1:0]

RXCEB

RXMSBA

RXCBLA[1:0]

RXCEA

If enabled, all bits that are received after the SOT event are transferred to the CRC checker with the option to skip up to 255 bits at the beginning.

The success of the CRC check is stored in the TESRA.CRCOA hardware register bit for path A and TESRB.CRCOB for path B until the next receiver start-up or path restart. The bits can be read with the “Read SRAM Register” SPI command from address 0x096 and 0x095 for path A and path B, respectively. If CRCOx is ‘1’, the CRC check was successful for the corresponding path.

The usage of the receive CRC checker is bound to the following conditions:

  • The CRC checker is available only in buffered receive mode and not in transparent receive mode.
  • The data payload of the telegram must be concluded by a well-defined code violation to keep arbitrary bits at the end of the telegram from disturbing the checksum. In general, use the telegram length EOT condition to define the number of received data bits. See Telegram Length in the Telegram Settings and Signal Checks from Related Links.

Do not use the CRC checker if the “Stay in RX after EOT” option is set (eepServices.rxSetPathx[1].RXTEHx = 1) because the checksum is reset at every receiver start-up phase and every path restart (compare Receive Telegram Handling). See Receive Telegram Handling in the RX Telegram Handling from Related Links.

CRC Length

The CRC checker can be configured to a 4-bit, 8-bit or 16-bit polynomial. The CRC length can be set independently for path A and path B of each service in the eepServices.RXBC1.RXCBLx[1:0] variables.

Address Service0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x0125

RXBC1

RXMSBB

RXCBLB[1:0]

RXCEB

RXMSBA

RXCBLA[1:0]

RXCEA

CRC Polynomial

The coefficients of the CRC polynomial can be independently configured for path A and path B of each service in the eepServices.RXCPx[0].RXCPLx (low byte) and eepServices.RXCPx[1].RXCPHx (high byte) variables. The LSB corresponds to the X0 coefficient and is always set to ‘1’ by the hardware regardless of the EEPROM setting.

Address Service0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x0117

RXCPA[0]

RXCPLA[7:0]

0x0118

RXCPA[1]

RXCPHA[7:0]

0x011E

RXCPB[0]

RXCPLB[7:0]

0x011F

RXCPB[1]

RXCPHB[7:0]

If the CRC length is set to 4 or 8, only the corresponding number of LSBs are relevant.

CRC Init Value

The CRC checksum can be preloaded with an initialization value that can be independently configured for path A and path B of each service in the eepServices.RXCIx[0].RXCILx (low byte) and eepServices.RXCIx[1].RXCIHx (high byte) variables.

The orientation of the checksum is always MSB first.

Address Service0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x0119

RXCIA[0]

RXCILA[7:0]

0x011A

RXCIA[1]

RXCIHA[7:0]

0x0120

RXCIB[0]

RXCILB[7:0]

0x0121

RXCIB[1]

RXCIHB[7:0]

If the CRC length is set to 4 or 8, only the corresponding number of LSBs is relevant.

CRC Skip Bits

Up to 255 bits at the beginning of the data payload can be omitted by the CRC checker. The number can be configured independently for path A and path B of each service in the eepServices.RXCSBx variables.

Address Service0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0x011B

RXCSBA

RXCSBA[7:0]

0x0122

RXCSBB

RXCSBB[7:0]