39.8 Memory Programming Specifications

Table 39-7. Memory Programming Specifications
Symbol Description Min. Typ.✝ Max. Unit Conditions
Data EEPROM Memory Specifications
ED* Data EEPROM byte endurance 100k — — Erase/Write cycles -40°C ≤ TA ≤ +85°C
tD_RET Characteristic retention — 40 — Year Provided no other violated specifications
VD_RW VDD for Read or Erase/Write operation VDDMIN — VDDMAX V
ND_REF* Total Erase/Write cycles before refresh(2) 1M 4M — Erase/Write cycles -40°C ≤ TA ≤ +85°C
tD_CE Byte/Multibyte/Full EEPROM Erase time — 10 11.7 ms
tD_WRE Byte Write time — 70 75 μs
tD_BEW Byte Erase and Write time — 10.07 — ms
Program Flash Memory Specifications
EP* Flash memory cell endurance 1k — — Erase/Write cycles
tP_RET Characteristic retention — 40 — Year
VP_RD VDD for Read operation VDDMIN — VDDMAX V
VP_REW VDD for Erase/Write operation VBOD(1) — VDDMAX V
tP_CE Chip Erase time — 11 11.6 ms
tP_PE Page Erase time — 10 11.7 ms
tP_WRD Byte/Word Write time — 70 75 μs

✝ Data found in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.

Note:
  1. During Chip Erase, the Brown-out Detector (BOD) configured with BODLEVEL0 is forced ON. The erase attempt will fail if the supply voltage VDD is below VBOD for BODLEVEL0.
  2. The number of times a separate location may be erased/written before a full refresh (erase/write) of the EEPROM array is required.