Writing these bits triggers a host operation as described below. The CMD
bits are strobe bits, and always read as zero. The acknowledge action is only valid
in host read mode. In host write mode, a command will only result in a repeated start
or stop condition. The CTRLB.ACKACT bit and the CMD bits can be written at the same
time, and then the acknowledge action will be updated before the command is
triggered.
Commands can only be issued when either the Client on Bus interrupt flag
(INTFLAG.SB) or Host on Bus interrupt flag (INTFLAG.MB) is '1'.
If CMD 0x1 is issued, a repeated start will be issued followed by the transmission of the current address in ADDR.ADDR. If another address is desired, ADDR.ADDR must be written instead of the CMD bits. This will trigger a repeated start followed by transmission of the new address.
Issuing a command will set the System Operation
bit in the Synchronization Busy register (SYNCBUSY.SYSOP).
Note: This bit field is not
enable-protected.
Table 32-5. Command Description
| CMD[1:0] |
Direction |
Action |
| 0x0 |
X |
(No action) |
| 0x1 |
X |
Execute acknowledge action succeeded by repeated Start |
| 0x2 |
0 (Write) |
No operation |
| 1 (Read) |
Execute acknowledge action succeeded by a byte read operation |
| 0x3 |
X |
Execute acknowledge action succeeded by issuing a stop condition |
