23.6.9 Counter Value in COUNT32 mode (CTRLA.MODE=0)

Note:
  1. This register is read-synchronized and write-synchronized: SYNCBUSY.COUNT must be checked to ensure the COUNT register synchronization is complete.
  2. This register must be written with 32-bit accesses only.
  3. Prior to any read access, this register must be synchronized by the user by writing the COUNT Read Synchronization Enable bit in the Control A register (CTRLA.COUNTSYNC = 1).
Name: COUNT
Offset: 0x18
Reset: 0x00000000
Property: PAC Write-Protection, Write-Synchronized

Bit 3130292827262524 
 COUNT[31:24] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 COUNT[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 COUNT[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 COUNT[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:0 – COUNT[31:0] Counter Value

These bits define the value of the 32-bit RTC counter in mode 0. This register must be written with a 32-bit write access.