16.5.4.1 SRAM Automatic Low-Power Mode

The SRAM is by default put in Low-Power mode (back-biased) if the device is in Standby Sleep mode.

This behavior can be changed by configuring the Back Bias bit in the Standby Configuration register (STDBYCFG.BBIASHS), refer to the table below for details.

Note: In Standby Sleep mode, the SRAM is put in Low-Power mode by default. This means that the SRAM is back-biased, and the DMAC cannot access it. The DMAC can only access the SRAM when it is not back biased (PM.STDBYCFG.BBIASHS=0x0). When the SysTick Overflow Interrupt is enabled the RAM Back Bias Control must be disabled (PM->STDBYCFG.bit.BBIASHS = 0) before entering Standby sleep mode.
Table 16-3. RAM Back-Biasing Mode
STBYCDFG.BBIASHS SRAM
0x0 No Back Biasing SRAM is not back-biased if the device is in Standby Sleep mode.
0x1 Standby Back Biasing mode SRAM is back-biased if the device is in Standby Sleep mode.