4.2 32-pin VQFN/32-pin TQFP Pinout and Multiplexing
32-pin QFP | Pin name | A | B | C | D | E | F | G | H | I | J | Supply | Reset State | |||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
EIC | REF | ADC0 | ADC1 | SDADC | AC | DAC | SERCOM | SERCOM-ALT | TC/TCC | TCC | PDEC | AC/ GCLK |
CCL | CCL/PDEC | ||||
1 | PA00/ XIN32 |
EXTINT[0] | SERCOM1/PAD[0] | TCC2/WO[0] | VDDANA | I/O, HI-Z | ||||||||||||
2 | PA01/ XOUT32 |
EXTINT[1] | SERCOM1/PAD[1] | TCC2/WO[1] | VDDANA | I/O, HI-Z | ||||||||||||
3 | PA02 | EXTINT[2] | AIN[0] | VOUT | VDDANA | I/O, HI-Z | ||||||||||||
4 | PA03 | EXTINT[3] | VREFA | AIN[1] | VDDANA | I/O, HI-Z | ||||||||||||
5 | PA04 | EXTINT[4] | VREFB | AIN[4] | AIN[0] | SERCOM0/PAD[0] | TCC0/WO[0] | CCL/IN[0] | VDDANA | I/O, HI-Z | ||||||||
6 | PA05 | EXTINT[5] | AIN[5] | AIN[1] | SERCOM0/PAD[1] | TCC0/WO[1] | CCL/IN[1] | VDDANA | I/O, HI-Z | |||||||||
7 | PA06 | EXTINT[6] | AIN[6] | INN[0] | AIN[2] | SERCOM0/PAD[2] | TCC1/WO[0] | CCL/IN[2] | VDDANA | I/O, HI-Z | ||||||||
8 | PA07 | EXTINT[7] | AIN[7] | INP[0] | AIN[3] | SERCOM0/PAD[3] | TCC1/WO[1] | CCL/OUT[0] | CCL/OUT[3] | VDDANA | I/O, HI-Z | |||||||
9 | VDDANA | VDDANA | ||||||||||||||||
10 | GNDANA | GNDANA | ||||||||||||||||
11 | PA08(1) | NMI | AIN[8] | AIN[10] | SERCOM0/PAD[0] | SERCOM2/PAD[0] | TCC0/WO[0] | TCC1/WO[2] | CCL/IN[3] | PDEC[0] | VDDIO | I/O, HI-Z | ||||||
12 | PA09(1) | EXTINT[9] | AIN[9] | AIN[11] | SERCOM0/PAD[1] | SERCOM2/PAD[1] | TCC0/WO[1] | TCC1/WO[3] | CCL/IN[4] | PDEC[1] | VDDIO | I/O, HI-Z | ||||||
13 | PA10(2) | EXTINT[10] | AIN[10] | SERCOM0/PAD[2] | SERCOM2/PAD[2] | TCC1/WO[0] | TCC0/WO[2] | GCLK/IO[4] | CCL/IN[5] | PDEC[2] | VDDIO | I/O, HI-Z | ||||||
14 | PA11(2) | EXTINT[11] | AIN[11] | SERCOM0/PAD[3] | SERCOM2/PAD[3] | TCC1/WO[1] | TCC0/WO[3] | GCLK/IO[5] | CCL/OUT[1] | VDDIO | I/O, HI-Z | |||||||
15 | PA14/ XIN |
EXTINT[14] | SERCOM2/PAD[2] | TC4/WO[0] | TCC0/WO[4] | GCLK/IO[0] | VDDIO | I/O, HI-Z | ||||||||||
16 | PA15/ XOUT |
EXTINT[15] | SERCOM2/PAD[3] | TC4/WO[1] | TCC0/WO[5] | GCLK/IO[1] | VDDIO | I/O, HI-Z | ||||||||||
17 | PA16(1) | EXTINT[0] | SERCOM1/PAD[0] | SERCOM3/PAD[0] | TCC2/WO[0] | TCC0/WO[6] | PDEC/QDI[0] | GCLK/IO[2] | CCL/IN[0] | VDDIO | I/O, HI-Z | |||||||
18 | PA17(1) | EXTINT[1] | SERCOM1/PAD[1] | SERCOM3/PAD[1] | TCC2/WO[1] | TCC0/WO[7] | PDEC/QDI[1] | GCLK/IO[3] | CCL/IN[1] | VDDIO | I/O, HI-Z | |||||||
19 | PA18 | EXTINT[2] | SERCOM1/PAD[2] | SERCOM3/PAD[2] | TC4/WO[0] | TCC0/WO[2] | PDEC/QDI[2] | AC/CMP[0] | CCL/IN[2] | VDDIO | I/O, HI-Z | |||||||
20 | PA19 | EXTINT[3] | SERCOM1/PAD[3] | SERCOM3/PAD[3] | TC4/WO[1] | TCC0/WO[3] | AC/CMP[1] | CCL/OUT[0] | VDDIO | I/O, HI-Z | ||||||||
21 | PA22(1) | EXTINT[6] | SERCOM3/PAD[0] | TC0/WO[0] | TCC0/WO[4] | GCLK/IO[6] | CCL/IN[6] | VDDIO | I/O, HI-Z | |||||||||
22 | PA23(1) | EXTINT[7] | SERCOM3/PAD[1] | TC0/WO[1] | TCC0/WO[5] | GCLK/IO[7] | CCL/IN[7] | VDDIO | I/O, HI-Z | |||||||||
23 | PA24 | EXTINT[12] | SERCOM3/PAD[2] | TC1/WO[0] | TCC1/WO[2] | CCL/IN[8] | VDDIO | I/O, HI-Z | ||||||||||
24 | PA25 | EXTINT[13] | SERCOM3/PAD[3] | TC1/WO[1] | TCC1/WO[3] | CCL/OUT[2] | VDDIO | I/O, HI-Z | ||||||||||
25 | PA27 | EXTINT[15] | GCLK/IO[0] | CCL/IN[10] | VDDIN | I/O, HI-Z | ||||||||||||
26 | RESET(3) | VDDIN | I, PU | |||||||||||||||
27 | PA28 | EXTINT[8] | GCLK/IO[0] | CCL/IN[11] | VDDIN | I/O, HI-Z | ||||||||||||
28 | GND | GND | ||||||||||||||||
29 | VDDCORE | |||||||||||||||||
30 | VDDIN | VDDIN | ||||||||||||||||
31 | PA30/ SWCLK |
EXTINT[10] | SERCOM1/PAD[2] | TCC1/WO[0] | SWCLK | GCLK/IO[0] | CCL/IN[3] | VDDIN | I/O, HI-Z | |||||||||
32 | PA31/ SWDIO |
EXTINT[11] | SERCOM1/PAD[3] | TCC1/WO[1] | CCL/OUT[1] | VDDIN | I/O, HI-Z | |||||||||||
Note:
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