42.6.4 Interrupts

The PDEC has the following interrupt sources:

  • Overflow/Underflow: OVF
  • Compare Channels: COMPx
  • Error: ERR
  • Velocity: VLC. This interrupt is available only in QDEC and HALL operation modes.
  • Direction: DIR. This interrupt is available only in QDEC and HALL operation modes.

Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status and Clear register (INTFLAG) is set when the interrupt condition occurs. Each interrupt can be individually enabled by writing a '1' to the corresponding bit in the Interrupt Enable Set register (INTENSET), and disabled by writing a '1' to the corresponding bit in the Interrupt Enable Clear register (INTENCLR). As both INTENSET and INTENCLR always reflect the same value, the status of interrupt enablement can be read from either register.

An interrupt request is generated when the interrupt flag is set and the corresponding interrupt is enabled. The interrupt request remains active until the interrupt flag is cleared, the interrupt is disabled or the PDEC is reset. See the INTFLAG register description for details on how to clear interrupt flags.

The user must read the INTFLAG register to determine which interrupt condition is present.
Note: Interrupts must be globally enabled for interrupt requests to be generated. See the Nested Vector Interrupt Controller.