m = 0 |
TSENS |
Start |
Asynchronous path only |
m = 1 |
PORT EV0 |
Event 0 |
Asynchronous path only |
m = 2 |
PORT EV1 |
Event 1 |
Asynchronous path only |
m = 3 |
PORT EV2 |
Event 2 |
Asynchronous path only |
m = 4 |
PORT EV3 |
Event 3 |
Asynchronous path only |
m = 5 |
DMAC CH0 |
Channel 0 |
Asynchronous, synchronous, and resynchronized
paths |
m = 6 |
DMAC CH1 |
Channel 1 |
Asynchronous, synchronous, and resynchronized
paths |
m = 7 |
DMAC CH2 |
Channel 2 |
Asynchronous, synchronous, and resynchronized
paths |
m = 8 |
DMAC CH3 |
Channel 3 |
Asynchronous, synchronous, and resynchronized
paths |
m = 9 |
TCC0 EV0 |
Input Event 0 |
Asynchronous path only |
m = 10 |
TCC0 EV1 |
Input Event 1 |
Asynchronous path only |
m = 11 |
TCC0 MC0 |
Match/Capture 0 |
Asynchronous path only |
m = 12 |
TCC0 MC1 |
Match/Capture 1 |
Asynchronous path only |
m = 13 |
TCC0 MC2 |
Match/Capture 2 |
Asynchronous path only |
m = 14 |
TCC0 MC3 |
Match/Capture 3 |
Asynchronous path only |
m = 15 |
TCC1 EV0 |
Input Event 0 |
Asynchronous path only |
m = 16 |
TCC1 EV1 |
Input Event 1 |
Asynchronous path only |
m = 17 |
TCC1 MC0 |
Match/Capture 0 |
Asynchronous path only |
m = 18 |
TCC1 MC1 |
Match/Capture 1 |
Asynchronous path only |
m = 19 |
TCC2 EV0 |
Input Event 0 |
Asynchronous path only |
m = 20 |
TCC2 EV1 |
Input Event 1 |
Asynchronous path only |
m = 21 |
TCC2 MC0 |
Match/Capture 0 |
Asynchronous path only |
m = 22 |
TCC2 MC1 |
Match/Capture 1 |
Asynchronous path only |
m = 23 |
TC0EV |
Input Event |
Asynchronous path only, synchronous, and resynchronized
paths |
m = 24 |
TC1EV |
Input Event |
Asynchronous, synchronous, and resynchronized
paths |
m = 25 |
TC2EV |
Input Event |
Asynchronous, synchronous, and resynchronized
paths |
m = 26 |
TC3EV |
Input Event |
Asynchronous, synchronous, and resynchronized
paths |
m = 27 |
TC4EV |
Input Event |
Asynchronous, synchronous, and resynchronized
paths |
m = 28 |
ADC0 START |
ADC start conversion |
Asynchronous path only |
m = 29 |
ADC0 FLUSH |
Flush ADC |
Asynchronous path only |
m = 30 |
ADC1 START |
ADC start conversion |
Asynchronous path only |
m = 31 |
ADC1 FLUSH |
Flush ADC |
Asynchronous path only |
m = 32 |
SDADC START |
ADC start |
Asynchronous path only |
m = 33 |
SDADC FLUSH |
Flush ADC |
Asynchronous path only |
m = 34 |
AC COMP0 |
Start comparator 0 |
Asynchronous path only |
m = 35 |
AC COMP1 |
Start comparator 1 |
Asynchronous path only |
m = 36 |
DAC START |
DAC start conversion |
Asynchronous path only |
m = 37 |
CCL LUTIN 0 |
CCL input |
Asynchronous path only |
m = 38 |
CCL LUTIN 1 |
CCL input |
Asynchronous path only |
m = 39 |
CCL LUTIN 2 |
CCL input |
Asynchronous path only |
m = 40 |
CCL LUTIN 3 |
CCL input |
Asynchronous path only |
m = 41 |
Reserved |
- |
Reserved |
m = 42 |
MTB START |
Micro Trace Buffer Start |
Asynchronous path only |
m = 43 |
MTB STOP |
Micro Trace Buffer Stop |
Asynchronous path only |
m = 44 |
PDEC EVU0 |
QDEC_EV0 |
Asynchronous path only |
m = 45 |
PDEC EVU1 |
QDEC_EV1 |
Asynchronous path only |
m = 46 |
PDEC EVU2 |
QDEC_EV2 |
Asynchronous path only |