6 I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively, it can be assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
No | PAD | EXTINT | PCINT | ADC/AC | PTC X | PTC Y | OSC | T/C | USART | I2C | SPI | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | PD[3] | INT1 | PCINT19 | X3 | Y11 | OC2B | ||||||
2 | PD[4] | PCINT20 | X4 | Y12 | T0 | XCK0 | ||||||
3 | PE[0] | PCINT24 | ACO | X8 | Y16 | ICP4 | SDA1 | |||||
4 | VCC | |||||||||||
5 | GND | |||||||||||
6 | PE[1] | PCINT25 | X9 | Y17 | T4 | SCL1 | ||||||
7 | PB[6] | PCINT6 | XTAL1/TOSC1 | |||||||||
8 | PB[7] | PCINT7 | XTAL2/TOSC2 | |||||||||
9 | PD[5] | PCINT21 | X5 | Y13 | OC0B / T1 | |||||||
10 | PD[6] | PCINT22 | AIN0 | X6 | Y14 | OC0A | ||||||
11 | PD[7] | PCINT23 | AIN1 | X7 | Y15 | |||||||
12 | PB[0] | PCINT0 | X10 | Y18 | CLKO | ICP1 | ||||||
13 | PB[1] | PCINT1 | X11 | Y19 | OC1A | |||||||
14 | PB[2] | PCINT2 | X12 | Y20 | OC1B | SS0 | ||||||
15 | PB[3] | PCINT3 | X13 | Y21 | OC2A | TXD1 | MOSI0 | |||||
16 | PB[4] | PCINT4 | X14 | Y22 | RXD1 | MISO0 | ||||||
17 | PB[5] | PCINT5 | X15 | Y23 | XCK1 | SCK0 | ||||||
18 | AVCC | |||||||||||
19 | PE[2] | PCINT26 | ADC6 | Y6 | ICP3 | SS1 | ||||||
20 | AREF | |||||||||||
21 | GND | |||||||||||
22 | PE[3] | PCINT27 | ADC7 | Y7 | T3 | MOSI1 | ||||||
23 | PC[0] | PCINT8 | ADC0 | Y0 | MISO1 | |||||||
24 | PC[1] | PCINT9 | ADC1 | Y1 | SCK1 | |||||||
25 | PC[2] | PCINT10 | ADC2 | Y2 | ||||||||
26 | PC[3] | PCINT11 | ADC3 | Y3 | ||||||||
27 | PC[4] | PCINT12 | ADC4 | Y4 | SDA0 | |||||||
28 | PC[5] | PCINT13 | ADC5 | Y5 | SCL0 | |||||||
29 | PC[6]/RESET | PCINT14 | ||||||||||
30 | PD[0] | PCINT16 | X0 | Y8 | OC3A | RXD0 | ||||||
31 | PD[1] | PCINT17 | X1 | Y9 | OC4A | TXD0 | ||||||
32 | PD[2] | INT0 | PCINT18 | X2 | Y10 | OC3B / OC4B |