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AVR® Microcontroller with Core Independent Peripherals and PicoPower® Technology ATmega328PB
Introduction
Features
1 Description
2 Configuration Summary
3 Ordering Information
4 Block Diagram
5 Pin Configurations
5.1 Pin Descriptions
6 I/O Multiplexing
7 Resources
8 About Code Examples
9 AVR CPU Core
9.1 Overview
9.2 ALU – Arithmetic Logic Unit
9.3 Status Register
9.4 General Purpose Register File
9.5 Stack Pointer
9.6 Instruction Execution Timing
9.7 Reset and Interrupt Handling
10 AVR Memories
10.1 Overview
10.2 In-System Reprogrammable Flash Program Memory
10.3 SRAM Data Memory
10.4 EEPROM Data Memory
10.5 I/O Memory
10.6 Register Description
11 System Clock and Clock Options
11.1 Clock Systems and Their Distribution
11.2 Clock Sources
11.3 Low-Power Crystal Oscillator
11.4 Low Frequency Crystal Oscillator
11.5 Calibrated Internal RC Oscillator
11.6 128 kHz Internal Oscillator
11.7 External Clock
11.8 Clock Output Buffer
11.9 Timer/Counter Oscillator
11.10 System Clock Prescaler
11.11 Register Description
12 CFD - Clock Failure Detection mechanism
12.1 Overview
12.2 Features
12.3 Operations
12.4 Timing Diagram
12.5 Register Description
13 Power Management and Sleep Modes
13.1 Overview
13.2 Sleep Modes
13.3 BOD Disable
13.4 Idle Mode
13.5 ADC Noise Reduction Mode
13.6 Power-Down Mode
13.7 Power-Save Mode
13.8 Standby Mode
13.9 Extended Standby Mode
13.10 Power Reduction Registers
13.11 Minimizing Power Consumption
13.12 Register Description
14 System Control and Reset
14.1 Resetting the AVR
14.2 Reset Sources
14.3 Power-on Reset
14.4 External Reset
14.5 Brown-out Detection
14.6 Watchdog System Reset
14.7 Internal Voltage Reference
14.8 Watchdog Timer
14.9 Register Description
15 INT - Interrupts
15.1 Interrupt Vectors in ATmega328PB
15.2 Register Description
16 EXTINT - External Interrupts
16.1 Pin Change Interrupt Timing
16.2 Register Description
17 I/O-Ports
17.1 Overview
17.2 Ports as General Digital I/O
17.3 Alternate Port Functions
17.4 Register Description
18 TC0 - 8-bit Timer/Counter0 with PWM
18.1 Features
18.2 Overview
18.3 Timer/Counter Clock Sources
18.4 Counter Unit
18.5 Output Compare Unit
18.6 Compare Match Output Unit
18.7 Modes of Operation
18.8 Timer/Counter Timing Diagrams
18.9 Register Description
19 TC1, 3, 4 - 16-bit Timer/Counter1, 3, 4 with PWM
19.1 Features
19.2 Overview
19.3 Accessing 16-bit Timer/Counter Registers
19.4 Timer/Counter Clock Sources
19.5 Counter Unit
19.6 Input Capture Unit
19.7 Compare Match Output Unit
19.8 Output Compare Units
19.9 Modes of Operation
19.10 Timer/Counter Timing Diagrams
19.11 Register Description
20 Timer/Counter 0, 1, 3, 4 Prescalers
20.1 Internal Clock Source
20.2 Prescaler Reset
20.3 External Clock Source
20.4 Register Description
21 TC2 - 8-bit Timer/Counter2 with PWM and Asynchronous Operation
21.1 Features
21.2 Overview
21.3 Timer/Counter Clock Sources
21.4 Counter Unit
21.5 Output Compare Unit
21.6 Compare Match Output Unit
21.7 Modes of Operation
21.8 Timer/Counter Timing Diagrams
21.9 Asynchronous Operation of Timer/Counter2
21.10 Timer/Counter Prescaler
21.11 Register Description
22 OCM - Output Compare Modulator
22.1 Overview
22.2 Description
23 SPI – Serial Peripheral Interface
23.1 Features
23.2 Overview
23.3 SS Pin Functionality
23.4 Data Modes
23.5 Register Description
24 USART - Universal Synchronous Asynchronous Receiver Transceiver
24.1 Features
24.2 Overview
24.3 Block Diagram
24.4 Clock Generation
24.5 Frame Formats
24.6 USART Initialization
24.7 Data Transmission – The USART Transmitter
24.8 Data Reception – The USART Receiver
24.9 Asynchronous Data Reception
24.10 Multi-Processor Communication Mode
24.11 Examples of Baud Rate Setting
24.12 Register Description
25 USARTSPI - USART in SPI Mode
25.1 Features
25.2 Overview
25.3 Clock Generation
25.4 SPI Data Modes and Timing
25.5 Frame Formats
25.6 Data Transfer
25.7 AVR USART MSPIM vs. AVR SPI
25.8 Register Description
26 TWI - Two-Wire Serial Interface
26.1 Features
26.2 Two-Wire Serial Interface Bus Definition
26.3 Data Transfer and Frame Format
26.4 Multi-Master Bus Systems, Arbitration, and Synchronization
26.5 Overview of the TWI Module
26.6 Using the TWI
26.7 Transmission Modes
26.8 Multi-Master Systems and Arbitration
26.9 Register Description
27 AC - Analog Comparator
27.1 Overview
27.2 Analog Comparator Multiplexed Input
27.3 Register Description
28 ADC - Analog-to-Digital Converter
28.1 Features
28.2 Overview
28.3 Starting a Conversion
28.4 Prescaling and Conversion Timing
28.5 Changing Channel or Reference Selection
28.6 ADC Noise Canceler
28.7 ADC Conversion Result
28.8 Temperature Measurement
28.9 Register Description
29 PTC - Peripheral Touch Controller
29.1 Features
29.2 Overview
29.3 Block Diagram
29.4 Signal Description
29.5 System Dependencies
29.6 Functional Description
30 debugWIRE On-chip Debug System
30.1 Features
30.2 Overview
30.3 Physical Interface
30.4 Software Breakpoints
30.5 Limitations of debugWIRE
30.6 Register Description
31 BTLDR - Boot Loader Support – Read-While-Write Self-Programming
31.1 Features
31.2 Overview
31.3 Application and Boot Loader Flash Sections
31.4 Read-While-Write and No Read-While-Write Flash Sections
31.5 Entering the Boot Loader Program
31.6 Boot Loader Lock Bits
31.7 Addressing the Flash During Self-Programming
31.8 Self-Programming the Flash
31.9 Register Description
32 MEMPROG - Memory Programming
32.1 Program And Data Memory Lock Bits
32.2 Fuse Bits
32.3 Signature Bytes
32.4 Calibration Byte
32.5 Serial Number
32.6 Page Size
32.7 Parallel Programming Parameters, Pin Mapping, and Commands
32.8 Parallel Programming
32.9 Serial Downloading
33 Electrical Characteristics
33.1 Absolute Maximum Ratings
33.2 DC Characteristics
33.3 Power Consumption
33.4 Speed Grades
33.5 Clock Characteristics
33.6 System and Reset Characteristics
33.7 SPI Timing Characteristics
33.8 Two-Wire Serial Interface Characteristics
33.9 ADC Characteristics
33.10 Parallel Programming Characteristics
34 Typical Characteristics
34.1 Active Supply Current
34.2 Idle Supply Current
34.3 ATmega328PB Supply Current of I/O Modules
34.4 Power-Down Supply Current
34.5 Pin Pull-Up
34.6 Pin Driver Strength
34.7 Pin Threshold and Hysteresis
34.8 BOD Threshold
34.9 Analog Comparator Offset
34.10 Internal Oscillator Speed
34.11 Current Consumption of Peripheral Units
34.12 Current Consumption in Reset and Reset Pulse Width
35 Register Summary
36 Instruction Set Summary
37 Packaging Information
37.1 32A
37.2 32-Pin VQFN
38 Errata
38.1 Rev. A
38.2 Rev. B
38.3 Rev. C - D
38.4 Rev. A - D
39 Revision History
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