1.2 Block Diagram

The following figure shows the various blocks available in IGLOO 2 FPGA.

Figure 1-1. IGLOO 2 FPGA Block Diagram

The following table lists the features supported by devices in the IGLOO 2 FPGA family.

Table 1-1. IGLOO® 2 FPGA Product Family

Peripherals

Features 1, 2M2GL005 (S)M2GL010 (S/T/TS)M2GL025 (T/TS)M2GL050 (T/TS)M2GL060 (T/TS)M2GL090 (T/TS)M2GL150 (T/TS)
Logic/DSPMaximum Logic Elements (4LUT + DFF)36,06012,08427,69656,34056,52086,184146,124
Math Blocks (18 × 18)112234727284240
PLLs and CCCs2266668
SPI/HPDMA/PDMA1 each1 each1 each1 each1 each1 each1 each
Fabric Interface Controllers1112112
Data Security

AES256, SHA256, and RNG

AES256, SHA256, and RNG

AES256, SHA256, and RNG

AES256, SHA256, and RNG

AES256, SHA256, RNG, ECC, and PUF

AES256, SHA256, RNG, ECC, and PUF

AES256, SHA256, RNG, ECC, and PUF

MemoryeNVM (KB)128256256256256512512

LSRAM18K Blocks

1021316969109236
μSRAM 1K Blocks1122347272112240
eSRAM (KB)64646464646464
Total RAM (Kbit)70391211041826182625865000
High SpeedDDR Controllers1 × 181 × 181 × 182 × 361 × 181 × 182 × 36
SerDes Lanes (T)04484416
PCIe End Points0112224
User I/OsMSIO (3.3V)119123157139279309292
MSIOD (2.5V)284040624040106
DDRIO (2.5V)6670701767676176
Total User I/O209233267377395425574
GradesCommercial(C), Industrial (I), Military (M), and Automotive (T1/T2)

C,I, T1, and T2

C,I, M, T1, and T2

C,I, M, T1, and T2

C,I, M,T1, and T2

C,I, M, T1, and T2

C,I, M, T1, andT2

C,I, and M
Note:
  1. Feature availability is package dependent.
  2. Data security features are only available in S and TS devices.
  3. Total logic might vary based on utilization of DSP and memories in your design. See UG0445: IGLOO2 FPGA and SmartFusion2 SoC FPGA Fabric User Guide for more information about DSP and memories.