7.6.2 Wait Mode

The purpose of Wait mode is to achieve very low-power consumption while maintaining the whole device in a powered state for a startup time of less than 10 μs.

In Wait mode, the clocks of the core, peripherals and memories are stopped. However, the core, peripherals and memories power supplies are still powered.

Wait mode is entered when the WAITMODE bit is set in CKGR_MOR and the field FLPM is configured to 00 or 01 in the PMC Fast Startup Mode register (PMC_FSMR).

The Cortex-M is able to handle external events or internal events to wake up the core. This is done by configuring the external lines WKUP0–13 as fast startup wake-up pins (refer to the “Fast Startup” section). RTC or RTT alarms or USB wake-up events can be used to wake up the processor. Resume from Wait mode is also achieved when a debug request occurs and the bit CDBGPWRUPREQ is set in the processor.

To enter Wait mode, first, select the Main RC oscillator as Main Clock and perform the following steps:

  1. Configure the FLPM field in the PMC_FSMR.
  2. Set Flash Wait State at 0.
  3. Set HCLK = MCK by configuring MDIV to 0 in the PMC Host Clock register (PMC_MCKR).
  4. Set the WAITMODE bit in the PMC Clock Generator Main Oscillator register (CKGR_MOR).
  5. Wait for MCKRDY = 1 in the PMC Status register (PMC_SR).
Note: Internal main clock resynchronization cycles are necessary between writing the MOSCRCEN bit and the entry in Wait mode. Depending on the user application, waiting for the MOSCRCEN bit to be cleared is recommended to ensure that the core will not execute undesired instructions.