22.5.4 EEFC Flash Result Register
| Name: | EEFC_FRR |
| Offset: | 0x0C |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| FVALUE[31:24] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | |||||||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| FVALUE[23:16] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FVALUE[15:8] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | |||||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FVALUE[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | |||||||||
Bits 31:0 – FVALUE[31:0] Flash Result Value
The result of a Flash command is returned in this register. If the size of the result is greater than 32 bits, the next resulting value is accessible at the next register read.