39.8.4 Write Operation

In write operation, the HSMCI Mode Register (HSMCI_MR) is used to define the padding value when writing non-multiple block size. If the bit PADV is 0, then 0x00 value is used when padding data, otherwise 0xFF is used.

If set, the bit DMAEN in the HSMCI DMA Condiguration Register (HSMCI_DMA) enables DMA transfer.

The flowchart, Write Functional Flow Diagram, shows how to write a single block with or without use of DMA facilities. Polling or interrupt method can be used to wait for the end of write according to the contents of the HSMCI Interrupt Mask Register (HSMCI_IMR).

Figure 39-9. Write Functional Flow Diagram

Note: 1. It is assumed that this command has been correctly sent (see Command/Response Functional Flow Diagram).

The flowchart in Read and Write Multiple Block shows how to manage read multiple block and write multiple block transfers with the DMA Controller. Polling or interrupt method can be used to wait for the end of write according to the contents of the HSMCI_IMR.

Figure 39-10. Read and Write Multiple Block

Notes: 1. It is assumed that this command has been correctly sent (see Command/Response Functional Flow Diagram).

2. Handle errors reported in HSMCI_SR.