56.5.10 AES Initialization Vector Register x

Name: AES_IVRx
Offset: 0x60 + x*0x04 [x=0..3]
Reset: –
Property: Write-only

Bit 3130292827262524 
 IV[31:24] 
Access WWWWWWWW 
Reset 00000000 
Bit 2322212019181716 
 IV[23:16] 
Access WWWWWWWW 
Reset 00000000 
Bit 15141312111098 
 IV[15:8] 
Access WWWWWWWW 
Reset 00000000 
Bit 76543210 
 IV[7:0] 
Access WWWWWWWW 
Reset 0000000– 

Bits 31:0 – IV[31:0] Initialization Vector

The four 32-bit Initialization Vector registers set the 128-bit Initialization Vector data block that is used by some modes of operation as an additional initial input.

AES_IVR0 corresponds to the first word of the Initialization Vector, AES_IVR3 to the last one.

These registers are write-only to prevent the Initialization Vector from being read by another application.

For CBC, OFB and CFB modes, the IV input value corresponds to the initialization vector.

For CTR mode, the IV input value corresponds to the initial counter value.

Note: These registers are not used in ECB mode and must not be written.