45.2 Features
The following are key features of the USART:
- Programmable Baud Rate Generator
- 5-bit to 9-bit Full-duplex Synchronous or Asynchronous Serial Communications
- 1, 1.5 or 2 Stop Bits in Asynchronous Mode or 1 or 2 Stop Bits in Synchronous Mode
- Parity Generation and Error Detection
- Framing Error Detection, Overrun Error Detection
- Digital Filter on Receive Line
- MSB or LSB first
- Optional Break Generation and Detection
- By 8 or 16 Oversampling Receiver Frequency
- Optional Hardware Handshaking RTS-CTS
- Optional Modem Signal Management DTR-DSR-DCD-RI
- Receiver Timeout and Transmitter Timeguard
- Optional Multidrop Mode with Address Generation and Detection
- RS485 with Driver Control Signal
- ISO7816, T = 0 or T = 1 Protocols for Interfacing with Smart Cards
- NACK Handling, Error Counter with Repetition and Iteration Limit
- IrDA Modulation and Demodulation
- Communication at up to 115.2 kbits
- SPI Mode
- Host or Client
- Serial Clock Programmable Phase and Polarity
- SPI Serial Clock (SCK) Frequency up to fperipheral clock/6
- LIN Mode
- Compliant with LIN 1.3 and LIN 2.0 SPECIFICATIONS
- Host or Client
- Processing of Frames with up to 256 Data Bytes
- Response Data Length can be Configurable or Defined Automatically by the Identifier
- Self-synchronization in Client Node Configuration
- Automatic Processing and Verification of the “Synch Break” and the “Synch Field”
- “Synch Break” Detection Even When Partially Superimposed with a Data Byte
- Automatic Identifier Parity Calculation/Sending and Verification
- Parity Sending and Verification Can be Disabled
- Automatic Checksum Calculation/sending and Verification
- Checksum Sending and Verification Can be Disabled
- Support Both “Classic” and “Enhanced” Checksum Types
- Full LIN Error Checking and Reporting
- Frame Slot Mode: Host Allocates Slots to the Scheduled Frames Automatically
- Generation of the Wakeup Signal
- LON Mode
- Compliant with CEA-709 Specification
- Full-layer 2 Implementation
- Differential Manchester Encoding/Decoding (CDP)
- Preamble Generation Including Bit- and Byte-sync Fields
- LON Timings Handling (beta1, beta2, IDT, etc.)
- CRC Generation and Checking
- Automated Random Number Generation
- Backlog Calculation and Update
- Collision Detection Support
- Supports Both comm_type=1 and comm_type=2 Modes
- Clock Drift Tolerance Up to 16%
- Optimal for Node-to-Node Communication (no embedded digital line filter)
- Test Modes
- Remote Loopback, Local Loopback, Automatic Echo
- Supports Connection of:
- Two DMA Controller Channels (DMAC)
- Offers Buffer Transfer without Processor Intervention
- Register Write Protection