34.7.1 Data Bus Width
A data bus width of 8 or 16 bits can be selected for each chip select. This option is controlled by the bit DBW in the Mode register (SMC_MODE) for the corresponding chip select.
Figure 34-2 shows how to connect a 512-Kbyte × 8-bit memory on NCS2. Figure 34-3 shows how to connect a 512-Kbyte × 16-bit memory on NCS2.