37.4 Signal Interface

The GMAC includes the following signal interfaces:

  • MII, RMII to an external PHY
  • MDIO interface for external PHY management
  • Slave APB interface for accessing GMAC registers
  • Master AHB interface for memory access
  • GTSUCOMP signal for TSU timer count value comparison
Table 37-1. GMAC Connections in Different Modes
Signal NameFunctionMIIRMII
GTXCK(1)Transmit Clock or Reference ClockTXCKREFCK
GTXENTransmit EnableTXENTXEN
GTX[3..0]Transmit DataTXD[3:0]TXD[1:0]
GTXERTransmit Coding ErrorTXERNot Used
GRXCKReceive ClockRXCKNot Used
GRXDVReceive Data ValidRXDVCRSDV
GRX[3..0]Receive DataRXD[3:0]RXD[1:0]
GRXERReceive ErrorRXERRXER
GCRSCarrier Sense and Data ValidCRSNot Used
GCOLCollision DetectCOLNot Used
GMDCManagement Data ClockMDCMDC
GMDIOManagement Data Input/OutputMDIOMDIO
Note:
  1. Input only. GTXCK must be provided with a 25 MHz / 50 MHz external crystal oscillator for MII / RMII interfaces, respectively.