40.7.3.4 Transfer Delays

The following figure shows a chip select transfer change and consecutive transfers on the same chip select. Three delays can be programmed to modify the transfer waveforms:

• Delay between the chip selects—programmable only once for all chip selects by writing field SPI_MR.DLYBCS. The SPI Client device deactivation delay is managed through DLYBCS. If there is only one SPI Client device connected to the Host, DLYBCS does not need to be configured. If several Client devices are connected to a Host, DLYBCS must be configured depending on the highest deactivation delay. Refer to details on the SPI Client device in the section “Electrical Characteristics”.
• Delay before SPCK—independently programmable for each chip select by writing SPI_CSRx.DLYBS. The SPI Client device activation delay is managed through DLYBS. Refer to details on the SPI Client device in the section “Electrical Characteristics” to define DLYBS.
• Delay between consecutive transfers—independently programmable for each chip select by writing SPI_CSRx.DLYBCT. The time required by the SPI Client device to process received data is managed through DLYBCT. This time depends on the SPI Client system activity.

These delays allow the SPI to be adapted to the interfaced peripherals and their speed and bus release time.