12.9.3 PIE1

Peripheral Interrupt Enable Register 1
Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 and PIE2.
Name: PIE1
Offset: 0x717

Bit 76543210 
 CCP1IETMR2IETMR1IERC1IETX1IEBCL1IESSP1IEADIE 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 7 – CCP1IE CCP1 Interrupt Enable

ValueDescription
1 CCP1 interrupts are enabled
0 CCP1 interrupts are disabled

Bit 6 – TMR2IE TMR2 Interrupt Enable

ValueDescription
1 TMR2 interrupts are enabled
0 TMR2 interrupts are disabled

Bit 5 – TMR1IE TMR1 Interrupt Enable

ValueDescription
1 TMR1 interrupts are enabled
0 TMR1 interrupts are disabled

Bit 4 – RC1IE EUSART1 Receive Interrupt Enable

ValueDescription
1 EUSART1 receive interrupts are enabled
0 EUSART1 receive interrupts are disabled

Bit 3 – TX1IE EUSART1 Transmit Interrupt Enable

ValueDescription
1 EUSART1 transmit interrupts are enabled
0 EUSART1 transmit interrupts are disabled

Bit 2 – BCL1IE MSSP1 Bus Collision Interrupt Enable

ValueDescription
1 MSSP1 bus collision interrupts are enabled
0 MSSP1 bus collision interrupts are disabled

Bit 1 – SSP1IE MSSP1 Interrupt Enable

ValueDescription
1 MSSP1 interrupts are enabled
0 MSSP1 interrupts are disabled

Bit 0 – ADIE ADC Interrupt Enable

ValueDescription
1 ADC interrupts are enabled
0 ADC interrupts are disabled
Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 and PIE2.