6 Device Utilization and Performance

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The following table lists the device utilization used for Median Filter.

Table 6-2. Median Filter Utilization
Device Details			Resources			Performance (MHz)	RAMs		Math Blocks	Chip Globals
Family	Device	Window Size	LUTs	DFF		Performance (MHz)	LSRAM	μSRAM	Math Blocks	Chip Globals
PolarFire® SoC	MPFS250T	Window-5	630	240		200	0	0	0	0
		Window-7	999	294		200	0	0	0	0
		Window-9	1161	384		200	0	0	0	0
PolarFire	MPF300T	Window-5	630	240		200	0	0	0	0
		Window-7	1067	294		200	0	0	0	0
		Window-9	1190	384		200	0	0	0	0
SmartFusion® 2	M2S150	Window-5	630	240		200	0	0	0	0
		Window-7	1084	294		200	0	0	0	0
		Window-9	1222	384		200	0	0	0	0

Important:

The data in this table is captured using typical synthesis and layout settings. CDR reference clock source was set to Dedicated with other configurator values unchanged.
Clock is constrained to 200 MHz while running the timing analysis to achieve the performance numbers.

Rev: A