15 Device Utilization and Performance

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The following table lists the device utilization used for Speed ID IQ PI Controller.

Table 15-1. Speed ID IQ PI Controller Utilization
Device Details		Resources			Performance (MHz)	RAMs		Math Blocks	Chip Globals
Family	Device	LUTs	DFF		Performance (MHz)	LSRAM	μSRAM	Math Blocks	Chip Globals
PolarFire® SoC	MPFS250T	627	411		120	0	0	1	0
PolarFire	MPF300T	627	411		120	0	0	1	0
SmartFusion® 2	M2S150	631	411		120	0	0	1	0

Important:

The data in the preceding table is captured using typical synthesis and layout settings. The CDR reference clock source is set to Dedicated with other configurator values unchanged.
Clock is constrained to 200 MHz while running the timing analysis to achieve the performance numbers.

Rev: A