15.1 Functional Description

This section describes the implementation details of the Speed ID IQ PI Controller.

The following figure shows the system-level block diagram of the Speed ID IQ PI Controller.

Figure 15-3. System-Level Block Diagram of Speed ID IQ PI Controller

Note: The Speed ID IQ PI controller executes a PI controller algorithm for three quantities—d-axis current, q-axis current, and motor speed. The block is designed to minimize hardware resource utilization. The block allows the PI controller algorithm to be run for one parameter at a time.