1.2.2 Inputs and Outputs Signals

The following table lists the input and output ports of ADC scaling.

Table 1-3. Inputs and Outputs of ADC Scaling
SignalName	Direction	Description
reset_i	Input	Asynchronous active low reset signal to design
sys_clk_i	Input	System clock
adc_results_rdy_i	Input	Trigger indicating ADC inputs are available
adc_scale_val_i	Input	Scaling value for currents
adc_result_ch0_i	Input	Channel 0 result from ADC
adc_result_ch1_i	Input	Channel 1 result from ADC
fault_threshold_i	Input	Threshold value of current above which a fault is indicated
done_o	Output	Indicates completion of scaling operations – high for one clock cycle
calib_done_o	Output	A constant high signal indicates offset calibration is complete
over_current_fault_o	Output	Indicates that at least one of the currents have exceeded the fault_threshold_i input value. The signal goes back to zero (not latched) when all the currents are less than fault_threshold_i.
ia_adc_o	Output	Scaled current value for phase a (from Channel 0)
ib_adc_o	Output	Scaled current value for phase b (from Channel 1)