5.2.1 Inputs and Outputs Signals

The following table lists the input and output ports of the Hall Interface block.

Table 5-3. Input and Output Ports of Hall Interface
Signal Name	Direction	Description
reset_i	Input	Asynchronous reset signal to design (active low)
sys_clk_i	Input	System clock
ha_i	Input	Hall A input signal
hb_i	Input	Hall B input signal
hc_i	Input	Hall C input signal
fil_trig_i	Input	Filter trigger input (must go high for one clock cycle to start filter operation)
filter_factor_i	Input	Represents the speed filter time constant – input as an exponent of 2 2^(ebeta_filter_factor_i) * sampling time
hall_sensor_pol_i	Input	Polarity of Hall sensor inputs, When 1, Active high When0, Active low
clear_buffer_i	Input	When1, clears internal speed filter buffer When 0, normal operation of buffer
speed_factor_i	Input	Speed factor input.
omega_done_o	Output	Speed computation done signal (pulse of one clock cycle width)
omega_out_o	Output	Speed output
angle_out_raw_o	Output	Raw angle output
theta_output_o	Output	Angle output