37.2.13 Error Detection and Recovery in SDR Mode
This Target module supports seven error detection and recovery methods specified in the MIPI I3C® Specification to avoid fatal conditions when errors occur. The status of these error conditions, when detected, is updated in the I3CxBSTAT Bus Status register.
| Error Type | Description | Error Detection Method | Error Recovery Method |
|---|---|---|---|
| TE0 | Invalid Broadcast Address or Dynamic Address | Invalid 7’h7E/W | Enable HDR Exit Detector and ignore all other patterns |
| TE1 | Invalid CCC Code | Parity check using T-Bit | |
| TE2 | Invalid Write Data | Parity check using T-Bit | Wait for next Stop or Restart |
| TE3 | Invalid Assigned Address during the Dynamic Address Assignment | Parity check using T-Bit | Generate NACK, then wait for next Restart |
| TE4 | Illegally formatted data during Dynamic Address Assignment | Invalid 7’h7E/R after Restart | Generate NACK, then wait for next Stop |
| TE5 | Illegally formatted CCC frame | Monitor the CCC frame | Generate NACK, then wait for next Stop or Restart |
| TE6 | Corrupted R/W during Private Transfer | Monitor data on SDA line | Wait for next Stop or Restart |