12.5.8 OSCEN
Note:
- This bit only controls external clock source supplied to the peripherals and has no effect on the system clock.
| Name: | OSCEN |
| Address: | 0x07E |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EXTOEN | HFOEN | MFOEN | LFOEN | SOSCEN | ADOEN | PLLEN | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – EXTOEN External Oscillator Enable
| Value | Description |
|---|---|
| 1 | EXTOSC is explicitly enabled, operating as specified by FEXTOSC |
| 0 | EXTOSC can be enabled by a peripheral request |
Bit 6 – HFOEN HFINTOSC Enable
| Value | Description |
|---|---|
| 1 | HFINTOSC is explicitly enabled, operating as specified by OSCFRQ |
| 0 | HFINTOSC can be enabled by a peripheral request |
Bit 5 – MFOEN MFINTOSC Enable
| Value | Description |
|---|---|
| 1 | MFINTOSC is explicitly enabled |
| 0 | MFINTOSC can be enabled by a peripheral request |
Bit 4 – LFOEN LFINTOSC Enable
| Value | Description |
|---|---|
| 1 | LFINTOSC is explicitly enabled |
| 0 | LFINTOSC can be enabled by a peripheral request |
Bit 3 – SOSCEN Secondary Oscillator Enable
| Value | Description |
|---|---|
| 1 | SOSC is explicitly enabled, operating as specified by SOSCPWR |
| 0 | SOSC can be enabled by a peripheral request |
Bit 2 – ADOEN ADCRC Oscillator Enable
| Value | Description |
|---|---|
| 1 | ADCRC is explicitly enabled |
| 0 | ADCRC may be enabled by a peripheral request |
Bit 0 – PLLEN PLL Enable(1)
| Value | Description |
|---|---|
| 1 | EXTOSC multiplied by the 4x system PLL is used by a peripheral request |
| 0 | EXTOSC is used by a peripheral request |