32.6.2.4 USB Reset

The USB bus reset is initiated by a connected host and managed by hardware.

During USB reset the following registers are cleared:

  • Device Endpoint Configuration (EPCFG) register - except for Endpoint 0
  • Device Frame Number (FNUM) register
  • Device Address (DADD) register
  • Device Endpoint Interrupt Enable Clear/Set (EPINTENCLR/SET) register
  • Device Endpoint Interrupt Flag (EPINTFLAG) register
  • Transmit Stall 0 bit in the Endpoint Status register (EPSTATUS.STALLRQ0)
  • Transmit Stall 1 bit in the Endpoint Status register (EPSTATUS.STALLRQ1)
  • Endpoint Interrupt Summary (EPINTSMRY) register
  • Upstream resume bit in the Control B register (CTRLB.UPRSM)

At the end of the reset process, the End of Reset bit is set in the Interrupt Flag register (INTFLAG.EORST).