3.4.2 10/100/1000 On-Board RGMII Ethernet Interface

The board features a complete on-board RGMII Ethernet interface, implemented with the LAN8840 PHY.

The LAN8840 is a low-power, single-port, triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical layer transceiver (PHY) that is optimized for precision process timing. The device enables highly accurate synchronization of motors, valves, actuators and sensors over standard CAT-5, CAT-5e and CAT-6 unshielded twisted pair (UTP) cables. For more information on the LAN8840, refer to www.microchip.com/en-us/product/LAN8840.

The LAN8840 1.1V core power is supplied by an external MIC33153 DC-DC converter. For more information on the MIC33153, refer to www.microchip.com/en-us/product/MIC33153.

The LAN8840 supports industry-standard RGMII (Reduced Gigabit Media Independent Interface) providing chip-to-chip connection to a host device with an integrated Gigabit Ethernet MAC.

An individual unique 48-bit MAC address (Ethernet hardware address) is allocated to this product and is stored in the Microchip SST26VF064BEUI-104I/SM QSPI Flash memory and in the Microchip 24AA025E48 TWI EEPROM. For more information on SST26VF064BEUI, refer to www.microchip.com/en-us/product/SST26VF064BEUI.

Additionally, for monitoring and control purposes, the RJ45 connectors feature LED functionality to indicate activity, link, and speed status.

Figure 3-27. 10/100/1000 On-Board RGMII Ethernet Interface Schematic
Figure 3-28. MIC33153 Ethernet Power Supply Schematic
Table 3-13. 10/100/1000 On-Board RGMII Ethernet Interface Signal Description
PIOSignal NameSignal Description

PA25

GMAC0_TXCTL_PA25

RGMII Transmit Enable signal

PA26

GMAC0_TX0_PA26

RGMII TX data line 0

PA27

GMAC0_TX1_PA27

RGMII TX data line 1

PA28

GMAC0_RXCTL_PA28

RGMII Receive Control signal

PA29

GMAC0_RX0_PA29

RGMII RX data line 0

PA30

GMAC0_RX1_PA30

RGMII RX data line 1

PA31

GMAC0_MDC_PA31

RGMII Management Data Clock signal

PB0

GMAC0_MDIO_PB0

RGMII Management Data I/O signal

PB1

GMAC0_TXCK_PB1

RGMII Transmit Clock signal

PB4

GMAC0_TX2_PB4

RGMII TX data line 2

PB5

GMAC0_TX3_PB5

RGMII TX data line 3

PB2

GMAC0_RX2_PB2

RGMII RX data line 2

PB6

GMAC0_RX3_PB6

RGMII RX data line 3

PB3

GMAC0_RXCK_PB3

RGMII Receive Clock signal

PC1

GMAC0_INT_PC1

Ethernet Device Interrupt signal