3.1.2 Power Management Integrated Circuit (PMIC)

The MCP16502 is a fully-featured PMIC optimized for Microchip MPU devices.

The MCP16502 integrates four DC-DC buck regulators and two auxiliary LDOs, and provides a comprehensive interface to the MPU, which includes an interrupt flag and an I²C interface.

All buck channels can support loads up to 1A. All bucks are 100% duty cycle capable.

Two 300 mA LDOs are provided so that sensitive analog loads can be supported.

The default power channel sequencing is built-in, according to the requirements of the Microchip MPU device.

The MCP16502 features a low no-load operational quiescent current, and draws less than 10 µA in full shutdown.

Active discharge resistors are provided on each output. All buck channels support safe start-up into pre-biased outputs.

The MCP16502 is available in a 32-pin 5 mm x 5 mm VQFN package. For more information on the MCP16502, refer to the product web page.

The MCP16502TAB provides all the specific voltages required for the MPU power rails:

  • Buck1 supplies 3.3V to the SAMA7D6 Series I/O pads and devices (VDD_3V3).
  • Buck2 supplies 1.35V to the SAMA7D6 Series DDR3 PHY pads (VDDIODDR) and external DDR3L memory device.
  • Buck3 supplies 1.15V to the SAMA7D6 Series core (VDDCORE).
  • Buck4 supplies 1.15V to the SAMA7D6 Series CPU (VDDCPU).

The figure below shows the power management scheme.

Figure 3-5. Power Management Unit Schematic
The two LDO outputs (VLDO1, VLDO2) are available for free use.
Table 3-1. MCP16502 TWI Address
Device7-bit Client Address

MCP16502

1011_011