3.4.10.2 Debug JTAG

A 20-pin JTAG header (J38) is provided on the board to facilitate software development and debugging using various JTAG emulators. The interface signals have a voltage level of 3.3V.

Figure 3-43. JTAG Connector Schematic
Table 3-29. JTAG Connector Pin Assignment
SignalPin No.Pin No.Signal

VDD_3V3

2

1

VDD_3V3

GND

4

3

NTRST

GND

6

5

TDI

GND

8

7

TMS

GND

10

9

TCK

GND

12

11

VDD_3V3

GND

14

13

TDO

GND

16

15

NRST

GND

18

17

NC

GND

20

19

NC