45.6.2.1 Initialization

The following PDEC registers are enable-protected, meaning they can only be written when the PDEC is disabled (CTRLA.ENABLE is zero):

• Event Control register (EVCTRL)

Enable-protection is denoted by the 'Enable-Protected' property in the register description.

The following register bits are enable-protected, meaning that they can only be written when the PDEC is disabled (CTRLA.ENABLE=0):

• Maximum Consecutive Missing Pulses bits in Control A register (CTRLA.MAXCMP[3:0])
• Angular Counter Length bits in Control A register (CTRLA.ANGULAR[2:0])
• I/O Pin x Invert Enable bits in Control A register (CTRLA.PINVEN[2:0])
• PDEC Input From Pin x Enable bits in Control A register (CTRLA.PINEN[2:0])
• Period Enable bit in Control A register (CTRLA.PEREN)
• PDEC Phase A and B Swap bit in Control A register (CTRLA.SWAP)
• Auto Lock bit in Control A register (CTRLA.ALOCK)
• PDEC Configuration bits in Control A register (CTRLA.CONF[2:0])
• Run in Standby bit in Control A register (CTRLA.RUNSTDBY)
• Operation Mode bits in Control A register (CTRLA.MODE[1:0])

Enable-protected bits in the CTRLA register can be written at the same time as CTRLA.ENABLE is written to '1', but not at the same time as CTRLA.ENABLE is written to '0'.