39.12.4 EndPoint Status n

Name: EPSTATUSn
Offset: 0x106
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
 BK1RDYBK0RDYSTALLRQ1STALLRQ0 CURBKDTGLINDTGLOUT 
Access RRRRRRR 
Reset 0002000 

Bit 7 – BK1RDY Bank 1 is ready

For Control/OUT direction Endpoints, the bank is empty.

Writing a one to the bit EPSTATUSCLR.BK1RDY will clear this bit.

Writing a one to the bit EPSTATUSSET.BK1RDY will set this bit.

ValueDescription
0 The bank number 1 is not ready : For IN direction Endpoints, the bank is not yet filled in.
1 The bank number 1 is ready: For IN direction Endpoints, the bank is filled in. For Control/OUT direction Endpoints, the bank is full.

Bit 6 – BK0RDY Bank 0 is ready

Writing a one to the bit EPSTATUSCLR.BK0RDY will clear this bit.

Writing a one to the bit EPSTATUSSET.BK0RDY will set this bit.

ValueDescription
0 The bank number 0 is not ready : For IN direction Endpoints, the bank is not yet filled in. For Control/OUT direction Endpoints, the bank is empty.
1 The bank number 0 is ready: For IN direction Endpoints, the bank is filled in. For Control/OUT direction Endpoints, the bank is full.

Bits 4, 5 – STALLRQ STALL bank x request

Writing a zero to the bit EPSTATUSCLR.STALLRQ will clear this bit.

Writing a one to the bit EPSTATUSSET.STALLRQ will set this bit.

This bit is cleared by hardware when receiving a SETUP packet.

ValueDescription
0 Disable STALLRQx feature.
1 Enable STALLRQx feature: a STALL handshake will be sent to the host in regards to bank x.

Bit 2 – CURBK Current Bank

Writing a zero to the bit EPSTATUSCLR.CURBK will clear this bit.

Writing a one to the bit EPSTATUSSET.CURBK will set this bit.

ValueDescription
0 The bank0 is the bank that will be used in the next single/multi USB packet.
1 The bank1 is the bank that will be used in the next single/multi USB packet.

Bit 1 – DTGLIN Data Toggle IN Sequence

Writing a zero to the bit EPSTATUSCLR.DTGLINCLR will clear this bit.

Writing a one to the bit EPSTATUSSET.DTGLINSET will set this bit.

ValueDescription
0 The PID of the next expected IN transaction will be zero: data 0.
1 The PID of the next expected IN transaction will be one: data 1.

Bit 0 – DTGLOUT Data Toggle OUT Sequence

Writing a zero to the bit EPSTATUSCLR.DTGLOUTCLR will clear this bit.

Writing a one to the bit EPSTATUSSET.DTGLOUTSET will set this bit.

ValueDescription
0 The PID of the next expected OUT transaction will be zero: data 0.
1 The PID of the next expected OUR transaction will be one: data 1.