39.15.1 Address of Data Buffer
Old address offset 0x00 and 0x10
| Name: | ADDR |
| Offset: | 0x00 |
| Reset: | 0xXXXXXXX |
| Property: | NA |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| ADDR[31:24] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| ADDR[23:16] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ADDR[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADDR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | x | x | x | x | x | x | x | x | |
Bits 31:0 – ADDR[31:0] Data Pointer Address Value
These bits define the data pointer address as an absolute word address in RAM. The two least significant bits must be zero to ensure the start address is 32-bit aligned.