24.4.3.2 Wake-up Reset

The wake-up reset occurs when the main supply is down. When the main supply POR output is active, all the reset signals are asserted except backup reset. When the main supply powers up, the POR output is resynchronized on 32 kHz. The processor clock is then enabled during 2 fast RC oscillator cycles with the reset asserted, in accordance with CPU requirements.

At the end of this delay, the processor and other reset signals rise. RSTC_SR.RSTTYP is updated to report a wake-up reset.

When the main supply is detected falling, the reset signals are immediately asserted. This transition is synchronous with the output of the main supply POR.