53.6.15 MCAN Interrupt Enable Register
The following configuration values are valid for all listed bit names of this register:
0: Disables the corresponding interrupt.
1: Enables the corresponding interrupt.
Name: | MCAN_IE |
Offset: | 0x54 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | ARAE | PEDE | PEAE | WDIE | BOE | EWE | |
Access | | | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | | | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| EPE | ELOE | | | DRXE | TOOE | MRAFE | TSWE | |
Access | R/W | R/W | | | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | | | 0 | 0 | 0 | 0 | |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TEFLE | TEFFE | TEFWE | TEFNE | TFEE | TCFE | TCE | HPME | |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RF1LE | RF1FE | RF1WE | RF1NE | RF0LE | RF0FE | RF0WE | RF0NE | |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 29 – ARAE Access to Reserved Address
Enable
Bit 28 – PEDE Protocol Error in Data Phase
Enable
Bit 27 – PEAE Protocol Error in Arbitration Phase
Enable
Bit 26 – WDIE Watchdog Interrupt Enable
Bit 25 – BOE Bus_Off Status Interrupt Enable
Bit 24 – EWE Warning Status Interrupt Enable
Bit 23 – EPE Error Passive Interrupt Enable
Bit 22 – ELOE Error Logging Overflow Interrupt Enable
Bit 19 – DRXE Message stored to Dedicated Receive Buffer Interrupt Enable
Bit 18 – TOOE Timeout Occurred Interrupt Enable
Bit 17 – MRAFE Message RAM Access Failure Interrupt Enable
Bit 16 – TSWE Timestamp Wraparound Interrupt Enable
Bit 15 – TEFLE Tx Event FIFO Event Lost Interrupt Enable
Bit 14 – TEFFE Tx Event FIFO Full Interrupt Enable
Bit 13 – TEFWE Tx Event FIFO Watermark Reached Interrupt Enable
Bit 12 – TEFNE Tx Event FIFO New Entry Interrupt Enable
Bit 11 – TFEE Tx FIFO Empty Interrupt Enable
Bit 10 – TCFE Transmission Cancellation Finished Interrupt Enable
Bit 9 – TCE Transmission Completed Interrupt Enable
Bit 8 – HPME High Priority Message Interrupt Enable
Bit 7 – RF1LE Receive FIFO 1 Message Lost Interrupt Enable
Bit 6 – RF1FE Receive FIFO 1 Full Interrupt Enable
Bit 5 – RF1WE Receive FIFO 1 Watermark Reached Interrupt Enable
Bit 4 – RF1NE Receive FIFO 1 New Message Interrupt Enable
Bit 3 – RF0LE Receive FIFO 0 Message Lost Interrupt Enable
Bit 2 – RF0FE Receive FIFO 0 Full Interrupt Enable
Bit 1 – RF0WE Receive FIFO 0 Watermark Reached Interrupt Enable
Bit 0 – RF0NE Receive FIFO 0 New Message Interrupt Enable