28.8.11 Interrupt Enable Set

Name: INTENSET
Offset: 0x17
Reset: 0x00
Property: Write-Protected

Bit 76543210 
     SYNCRDYWINMONOVERRUNRESRDY 
Access R/WR/WR/WR/W 
Reset 0000 

Bit 3 – SYNCRDY Synchronization Ready Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Synchronization Ready Interrupt Enable bit, which enables the Synchronization Ready interrupt.

ValueDescription
0

The Synchronization Ready interrupt is disabled.

1

The Synchronization Ready interrupt is enabled.

Bit 2 – WINMON Window Monitor Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Window Monitor Interrupt bit and enable the Window Monitor interrupt.

ValueDescription
0

The Window Monitor interrupt is disabled.

1

The Window Monitor interrupt is enabled.

Bit 1 – OVERRUN Overrun Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Overrun Interrupt bit and enable the Overrun interrupt.

ValueDescription
0

The Overrun interrupt is disabled.

1

The Overrun interrupt is enabled.

Bit 0 – RESRDY Result Ready Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will set the Result Ready Interrupt bit and enable the Result Ready interrupt.

ValueDescription
0

The Result Ready interrupt is disabled.

1

The Result Ready interrupt is enabled.