28.8.10 Interrupt Enable Clear

Name: INTENCLR
Offset: 0x16
Reset: 0x00
Property: Write-Protected

Bit 76543210 
     SYNCRDYWINMONOVERRUNRESRDY 
Access R/WR/WR/WR/W 
Reset 0000 

Bit 3 – SYNCRDY Synchronization Ready Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Synchronization Ready Interrupt Enable bit and the corresponding interrupt request.

ValueDescription
0

The Synchronization Ready interrupt is disabled.

1

The Synchronization Ready interrupt is enabled, and an interrupt request will be generated when the Synchronization Ready interrupt flag is set.

Bit 2 – WINMON Window Monitor Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Window Monitor Interrupt Enable bit and the corresponding interrupt request.

ValueDescription
0

The window monitor interrupt is disabled.

1

The window monitor interrupt is enabled, and an interrupt request will be generated when the Window Monitor interrupt flag is set.

Bit 1 – OVERRUN Overrun Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Overrun Interrupt Enable bit and the corresponding interrupt request.

ValueDescription
0

The Overrun interrupt is disabled.

1

The Overrun interrupt is enabled, and an interrupt request will be generated when the Overrun interrupt flag is set.

Bit 0 – RESRDY Result Ready Interrupt Enable

Writing a zero to this bit has no effect.

Writing a one to this bit will clear the Result Ready Interrupt Enable bit and the corresponding interrupt request.

ValueDescription
0

The Result Ready interrupt is disabled.

1

The Result Ready interrupt is enabled, and an interrupt request will be generated when the Result Ready interrupt flag is set.