23.4 PMD Register Summary
See the PMD module in the Product Memory Mapping Overview from Related Links for the base address.
Note: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See CLR, SET and INV Registers from Related Links.
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0xBF | Reserved | |||||||||
| 0xC0 | PMD1 | 7:0 | ADCMD | ACMD | ||||||
| 15:8 | CVDMD | ADCSARMD | ||||||||
| 23:16 | ||||||||||
| 31:24 | QSPIMD | |||||||||
0xC4 ... 0xCF | Reserved | |||||||||
| 0xD0 | PMD2 | 7:0 | ||||||||
| 15:8 | ||||||||||
| 23:16 | ||||||||||
| 31:24 | REFO4MD | REFO3MD | REFO2MD | REFO1MD | REFO6MD | REFO5MD | ||||
0xD4 ... 0xDF | Reserved | |||||||||
| 0xE0 | PMD3 | 7:0 | TC3MD | TC2MD | TC1MD | TC0MD | DACMD | SER2MD | SER1MD | SER0MD |
| 15:8 | TCC2MD | TCC1MD | TCC0MD | TC7MD | TC6MD | TC5MD | TC4MD | |||
| 23:16 | ||||||||||
| 31:24 |