2.5 Configuration Words

The devices have seven Configuration Words, starting at address 8007h. The Configuration bits enable or disable specific features, placing these controls outside the normal software process, and they establish configured values prior to the execution of any software.

In terms of programming, consider these important Configuration bits:
  1. ICSPDIS: Programming and Debugging Interface Disable (PDID) bit(1)
    • 1 = OFF: ICSP and debugging interface fully enabled
    • 0 = ON: ICSP and debugging interface fully disabled
  2. LVP: Low-Voltage Programming Enable bit
    • 1 = ON: Low-Voltage Programming is enabled. MCLR/VPP pin function is MCLR. The MCLRE Configuration bit is ignored.
    • 0 = OFF: High voltage on MCLR/VPP must be used for programming
    Important: The LVP bit cannot be written (to ‘0’) while operating from the LVP programming interface. The purpose of this rule is to prevent the user from dropping out of LVP mode while programming from LVP mode, or accidentally eliminating LVP mode from the Configuration state. For more information, see Low-Voltage Programming (LVP) Mode.
  3. MCLRE: Master Clear (MCLR) Enable bit
    • If LVP = 1: RA3 (8/14/20-pin devices) / RE3 (28/40-pin devices) pin function is MCLR
    • If LVP = 0
      • 1 = MCLR pin is MCLR
      • 0 = MCLR pin function is a port-defined function
  4. CP: User NVM Program Memory Code Protection bit
    • 1 = OFF: User Program Flash Memory code protection is disabled
    • 0 = ON: User Program Flash Memory code protection is enabled
  5. CPD: User Data EEPROM Code Protection bit
    • 1 = OFF: Data EEPROM code protection is disabled
    • 0 = ON: Data EEPROM code protection is enabled

For more information on code protection, see Enhanced Code Protection.

CAUTION:
  1. Once enabled, the ICSPDIS bit cannot be disabled (even through a Bulk Erase operation) and the Programming and Debugging Interface is completely disabled. Refer to the PDID section for more information about the PDID feature.