17.1.2 Signal Routing Port Input

The input to the Signal Routing Port is selected using the PORTWINx registers. There is a separate PORTWINx register for each pin of the Signal Routing Port. Several core independent peripherals are available as input selections to the multiplexer as shown in the PORTWINx Input Selections table below. In addition to the core independent peripherals, the following inputs are also added to each multiplexer:

  • The corresponding LATWn register bit – allows for software writes to the Signal Routing pin.
  • Input from the immediate next Signal Routing pin RW[n+1] – allows for shift register operation.
  • An external I/O pin – allows physical inputs.
As previously mentioned, one of the input selections available to the PORTWINx register is the LATWn register bit. The LATW register allows the user to write a value to the Signal Routing Port from software. Unlike a typical I/O port, LATW is a separate register from the actual data register as shown in Figure 17-1.
Important:
  1. To perform a software write to one of the Signal Routing pins using the LATW register, the PORTWINx register for that Signal Routing pin must select the corresponding LATWn bit as input to the Signal Routing Port.
  2. Reading the LATW register returns the most recently written value to the LATW register and not the actual input to the Signal Routing Port. The actual input to the Signal Routing Port is selected using PORTWINx register and can be read using the PORTW register. This is similar to the standard I/O pins read/write operations.

The following input selection multiplexers are available on this device:

Table 17-1. PORTWINx Input Selections
IN[3:0]PORTWIN0PORTWIN1PORTWIN2PORTWIN3PORTWIN4PORTWIN5PORTWIN6PORTWIN7
1111-1010ReservedReservedReservedReservedReservedReservedReservedReserved
1001CLC1_OUTCLC2_OUTCLC3_OUTCLC4_OUTCLC1_OUTCLC2_OUTCLC3_OUTCLC4_OUT
1000CCP1_OUTPWM1S1P1_OUTPWM2S1P1_OUTCCP1_OUTCCP2_OUTPWM1S1P2_OUTPWM2S1P2_OUTCCP2_OUT
0111SPI1_SDOSPI1_SCKSPI2_SDOSPI2_SCKSPI1_SDOSPI1_SCKSPI2_SDOSPI2_SCK
0110TMR0_overflowTMR1_overflowTMR2_OUTTMR4_OUTTMR0_overflowTMR1_overflowTMR2_OUTTMR4_OUT
0101CLKREF_OUTReservedCLKREF_OUTReservedCLKREF_OUTReservedCLKREF_OUTReserved
0100PORTWIN0PPSPORTWIN1PPSPORTWIN0PPSPORTWIN1PPSPORTWIN0PPSPORTWIN1PPSPORTWIN0PPSPORTWIN1PPS
0011RC0RC1RC2RC3RC4RC5RC6RC7
0010RW7RW0RW1RW2RW3RW4RW5RW6
0001RW1RW2RW3RW4RW5RW6RW7RW0
0000LATW0LATW1LATW2LATW3LATW4LATW5LATW6LATW7