17.1.4 Interrupt-on-Change and ADC Triggers

All the Signal Routing Ports on this device support Interrupt-on-Change. The Interrupt-on-Change feature for PORTW is provided using the IOCWP, IOCWN and IOCWF registers. The logical OR of all the Interrupt-on-Change flags for all the Signal Routing Ports is available at the system-level as IOCV interrupt as shown in Figure 17-2 below. See the “IOC – Interrupt-on-Change” chapter for more information.

Figure 17-2. Interrupt-on-Change for Signal Routing Port

In addition to the Interrupt-on-Change, the output of each pin of the Signal Routing Port is also a trigger for the ADC as shown in Figure 17-1. The IOCWP and IOCWN registers are used to select the edge of the output pin transition that generates a trigger.

The following steps are used to configure a Signal Routing pin RWn as an ADC trigger:
  1. Select the edge that may trigger the ADC by setting the appropriate bit in the IOCWP and IOCWN registers. Setting IOCWPn bit enables positive edge trigger. Setting the IOCWNn bit enables negative edge trigger. Setting both IOCWPn and IOCWNn bits enable trigger on either edge.
  2. Select the “IOCWFn Flag” as the trigger source in the ADACT registers as appropriate.
See the “Types of Hardware Triggers” section in the “Auto-Conversion Trigger” section in the “ADC – Analog-to-Digital Converter with Computation Module” chapter for more information.
Important: While the individual IOCWFn Interrupt-on-Change flags are available as triggers to the ADC module, there is only one system-level Interrupt-on-Change interrupt source available as IOCSR which is the logical OR of all Interrupt-on-Change flags of all the Signal Routing Ports on the device.