38.2.5 Comparator Speed/Power Selection

The trade-off between speed and power can be optimized during program execution with the Comparator Speed/Power Selection (SP) bit. When the SP bit is set (SP = 1), the comparator operates in Low-Speed Low-Power mode. Low-Speed, Low-Power mode optimizes power consumption, but at the cost of slower comparator speed. When the SP bit is cleared (SP = 0), the comparator operates at a higher speed, but at the cost of higher power consumption.